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In the footsteps of ISSCC: NEC prepares 45nm SRAM

During the conference ISSCC (International Solid-State Circuits Conference), many questions were highlighted regarding the prospects for the transition to production standards for semiconductor microcircuits less than 90 nm. Developers from IBM, Samsung, Texas Instruments and Virage Logic have formulated the main challenges facing 65nm and 45nm static RAM technologies in mass production.

In the first place in terms of “problematic” are errors caused by charge fluctuations (i.e. n. soft errors) – since the geometric dimensions of the elements are constantly decreasing, the number of electrons required to create a potential corresponding to the logical “1” level decreases, therefore SRAM cells become more and more sensitive to the effects of ionizing radiation (for example, to alpha radiation, which is harmless to humans , t. to. it is almost 100% absorbed into the skin). The second main problem facing developers is the leakage current, which grows with the decrease in the thickness of the dielectric layer.

Meanwhile, NEC claims it was able to create a SRAM that looks pretty promising – it is hoped that it could go up to 45nm.

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